MCU CSR interface-SERDES interface-PHY with PIPE interface
                     USB IP Subsystem
• USB IP Subsystem Full range of USB controllers supporting USB 
2.0 / USB 3.0 / USB 3.1 gen1 and gen2 in host and device mode 
of operation. 
• Supports AXI interface and in-built DMA features.
• Full range of USB controllers supporting USB 2.0 / USB 3.0 / USB 
3.1 gen1 and gen2 in host and device mode of operation. 
• Supports AXI interface and in-built DMA features.
• SiFive provides a complete portfolio of USB-certified controllers 
with host and device functionality. 
https://openfive.com/usb-ip-subsystem/
USB IP Subsystem
• SiFive provides a complete portfolio of USB-certified controllers with host 
and device functionality. They are integrated with our PHY partners in 
multiple foundries and nodes. FPGA boards are available for demo and 
prototype use.
https://openfive.com/usb-ip-subsystem/
USB 3.1 Device Controller
• Compliant with USB 3.1 Gen 2 specification, USB 3.1 PIPE interface
• Supports 32/64 data bus width
• AXI, AHB bus standards
• Supports 32/64/128 bit data bus
• Supports all USB 3.1 power down modes
• Supports Ccontrol, bulk, Iiochronous and interrupt transactions
• Bulk endpoint support streaming
• Device can be configurable up to 15 IN and 15 OUT functional endpoints
• Configurable number of function endpoints
• Dynamically configurable endpoint FIFO for optimum usage of memory
• Synchronous SRAM interface for FIFO
• Fully integrated DMA controller
https://openfive.com/usb-ip-subsystem/
USB 3.2 Retimer
• Compliant to USB 3.1 Appendix E standard
• Supports Gen 1(5G) and Gen 2(10G) speeds
• Supports all low power states
• Supports MCU CSR interface to drive ASIC control and status register
• Supports PCS logic with 8b/10b for Gen1 and 128b/132b for Gen2 support
• Supports SERDES interface
• Optional support to external PHY with PIPE interface
• SRIS architecture
• “Pass through” and “local loopback” supported
• Provision to monitor key events including internal errors
• Provision to monitor link states
• Option to tune PIPE control signal through CSR interface
• Master loopback support for production test
• Option to generate LFPS pattern in debug mode
https://openfive.com/usb-ip-subsystem/
Please do visit my website for 
in-depth information.
Website: 
https://openfive.com/usb-ip-subsystem/